Intel CEO: Lithography, Multi-patterning Delay 10nm (April 2018)


During Intel's Q1-2018 earnings conference call, CEO Brian Kraznich said, “Volume production (of 10nm) is moving from the second half of 2018 into 2019...We understand the yield issues and have defined improvements for them, but they will take time to implement and qualify...They're really tied to this being the last technology tied to not having EUV and the amount of multi-patterning and the effects of that on defects...Think of them as improvements to the various edge stuff, the lithography stuff and things like that in order to really drive the multi-patterning and, in some cases, multi-multi-patterning, where you have four, five, six layers of patterning to produce a feature. It's really about that.”

Sources: Transcript of Intel's Q2-2018 conference call on; EETimes coverage of the 10nm delay