A Different Encryption Key on Every Chip
One of the strengths of maskless lithography is the possibility of writing a different pattern to each die site. This allows for many forms of serialization and customization. Possible applications include:
- Writing a true hardware CPU-ID onto each individual processor chip that would be impossible to change
- Permanently storing any number of encryption keys in hardware, uniquely enabling encryption and authentication
- Preventing counterfeiting by writing the serial number, manufacturing location and date on every chip
Many companies as well as government agencies must guard their intellectual property. The mask making tool chain exposes much of the underlaying design to possible theft. Maskless wafer writing can keep the design database encrypted until it the wafer is written.
Smaller Quantity ASICs
Protogype wafers could always be included with any fab run. Test features could be included or changed as needed. Mixed asic wafers such as MOSIS could be done economically and included in any fab run.
Simplified ECAD Tool Chain
Proton beam have very little interaction with each other or with wafer surface charge up, thus there is little need for proximity correction. If 193i compatibility is not needed, then less restrictive layout optimization can be done.